# Welcome to FPGA Developers' Forum! 👋

**URL:** <https://fpga-developers-forum.web.cern.ch/t/welcome-to-fpga-developers-forum/5>\
**Category:** General\
**Created:** [16 May 2024 07:08 UTC](https://fpga-developers-forum.web.cern.ch/t/welcome-to-fpga-developers-forum/5 "2024-05-16T07:08:25Z")\
**Posts on this page:** 1\
**Page:** 1

<div class="post-metadata">

**Author:** ![system](https://fpga-developers-forum.web.cern.ch/uploads/default/original/1X/9e4e8becec81b50aee732cb2f1bc542f5cdf28d5.png) [@system](https://fpga-developers-forum.web.cern.ch/u/system)\
**Post date:** [16 May 2024 07:08 UTC](https://fpga-developers-forum.web.cern.ch/t/welcome-to-fpga-developers-forum/5/1 "2024-05-16T07:08:26Z")

</div>

We are so glad you joined us.

> ## FPGA Developers’ Forum
> 
> An open place to discuss FPGA design

Here are some things you can do to get started:

🗣 **Introduce yourself** by adding information about yourself and your interests to [your profile](https://fpga-developers-forum.web.cern.ch/my/preferences/account). What is one thing you’d like to be asked about?

📖 **Get to know the community** by [browsing discussions](https://fpga-developers-forum.web.cern.ch/top) that are already happening here. When you find a post interesting, informative, or entertaining, use the ❤ to show your appreciation or support!

🤝 **Contribute** by commenting, sharing your own perspective, asking questions, or offering feedback in the discussion. Before replying or starting new topics, please review the [Community Guidelines](https://fpga-developers-forum.web.cern.ch/faq).

> If you need help or have a suggestion, feel free to ask in #Site Feedback or [contact the admins](https://fpga-developers-forum.web.cern.ch/about).